Former England captain Michael Vaughan has defended star India batter Virat Kohli after his flop show with the bat in the 1st innings of the Perth Test against Australia. Kohli managed just five runs before fending off a climbing Josh Hazlewood delivery to Usman Khawaja at slip. His 12-ball stay in the middle extended his lean patch with the bat, having managed just 93 runs in the recent home series loss to New Zealand. The former India captain hasn't scored a century since the West Indies tour last year. Vaughan, however, refused to rule Kohli out just yet despite his failure in the 1st innings in Perth. He suggested it's too early to judge Kohli, highlighting how the excessive seam movement made life difficult for most batters. "It is too hard to judge him. Coming out of the crease in Perth when the ball is bouncing is a tactic not many try to pull off and he went for that. It bounced and he found the outside edge. But I think that now we have seen Australia (bat),
IT Minister Ashwini Vaishnaw explained how his ministry is working to create an all-inclusive semi-conductor ecosystem in India in line with Prime Minister Narendra Modi's "Make-in-India" vision.
In a little over four-minute-long video, the minister charts up the plan to develop a comprehensive semiconductor setup in India, complete with a talent pool of thousands and a research system encompassing over a hundred universities in the country.
During his media interaction today after the cabinet approved three more semiconductor units, the minister laid out the plan on a whiteboard, drawing up each step with a marker in great detail.
"There are four main components in the entire process - Design, fabrication, or FAB, assembly-testing-marking-packaging, or ATMP, and electronics manufacturing, or circuit," the minister explained.
"The primary thing we are developing for this is a talent pool. The second big thing we are doing is research and development, or R&D," he added.
What steps are being taken to augment the talent pool and for research and development? The minister explained: "The most difficult and the most expensive tools, called Electronic Design Automation, or EDA, tools, are supplied by Cadence, Synopsys, and Siemens. These are very expensive. If you go to buy one, you will have to shell out Rs 10 crore - Rs 15 crore for just one license. So, we have spoken to these three companies and have taken their EDA tools and given them to 104 universities in the country."
"We have given the license and login to not just the IITs, but also to the tier-II and tier-III universities so they can expose and train their students on how to use these tools live and not just in theory. The students can now take up a project and design a new mobile chip and make it. This will give birth to new start-ups and will add to our talent pool. This talent pool of some three lakhs will feed into Design, FAB, and ATMP aspects," he said.
The programme is a very comprehensive one and hence, the foundation is very important, the minister said, adding, "What we have been able to achieve in two years, many countries have not been able to do that in five years. "
"We have the Design and the ATMP components and have started work on developing FAB. Now, Applied Materials is the largest manufacturer of equipment. They have started setting up a plant in India. They are designing in India and manufacturing in India. So, all of this will finally come together and aid manufacturing, in line with PM's "Make-in-India" vision," Mr Vishnaw asserted.
Earlier today, the Union cabinet approved the setting up of three semiconductor-making units at an investment of Rs 1.26 lakh crore as part of an attempt to cut India's dependence on imports to meet the requirements of chips.
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